Processes for manufacturing printed wiring boards

ABSTRACT

Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation-in-part of U.S. patent Ser. No.11/214,690 to Vasoya filed Aug. 29, 2005 now U.S. Pat. No. 7,301,105 andclaims the benefit of U.S. Provisional Patent Application Ser. No.60/750,013 to Vasoya filed Mar. 6, 2006. The disclosure of U.S. patentapplication Ser. No. 11/214,690 to Vasoya and U.S. Provisional PatentApplication Ser. No. 60/780,013 to Vasoya is hereby incorporated hereinby reference in its entirety.

BACKGROUND

The present invention generally relates to the manufacture of printedwiring boards and more specifically to the filling of clearance patternsin conductive constraining core layers used in the construction ofmultilayer printed wiring board (PWB).

Computers and similar electronics products are pervasive in consumer,businesses, military, aerospace and governmental activities. The use ofelectronics in critical applications has created an increased demand forreliable electronics. Many applications specify electronics that willrun longer with less down time than was expected in the past.

The increased emphasis on reliability amongst customers also extends toPWBs. PWBs can be used to establish electrical connections betweendevices. In some instances, the devices can be mounted on the printedwiring board. The manner in which the devices are mounted is typicallydependent upon the packaging of the device. Applications for printedwiring boards can include challenges such as thermal management,expansion mismatch control, low stiffness or rigidity and higher weight.Materials that have been used in the past to address some of theseissues include thick metal core, copper-Invar-copper (CIC),copper-Moly-copper (CMC). These metal core materials are electricallyconductive and require special processing in order to be incorporatedinto printed wiring board structures. These special processes caninclude drilling clearance patterns, surface preparation, clearingpattern filling and additional lamination steps. Use of these materialsand the associated additional processes are typically associated with asubstantially lower manufacturing yield and additional labor cost. Inaddition, drilling small via holes or plated through holes (PTH) throughthick metal cores can be problematic. An inability to drill small viaholes through a material can limit the usefulness of the material in theconstruction of high density interconnects.

A variety of other materials can be used in place of the metal materialsabove to try and address reliability issues such as thermal management,expansion mismatch control, low stiffness or rigidity and higher weight.U.S. Pat. No. 6,869,664 to Vasoya et al., U.S. patent application Ser.No. 11/131,130 to Vasoya, U.S. patent application Ser. No. 11/376,806 toVasoya and U.S. Provisional Patent Application Ser. No. 60/831,108 toVasoya disclose techniques that can be used to manufacture printedwiring boards having a desired coefficient of thermal expansion (CTE)using layers incorporating carbon materials such as woven carbon fiber.The disclosure of U.S. Pat. No. 6,869,664 to Vasoya et al., U.S. patentapplication Ser. No. 11/131,130 to Vasoya, U.S. patent application Ser.No. 11/376,506 to Vasoya and U.S. Provisional Patent Application Ser. No60/831,108 to Vasoya is incorporated herein by reference in itsentirety.

SUMMARY OF THE INVENTION

Printed wiring boards and manufacturing techniques for drilling andfilling clearance patterns in an electrically conductive constrainingcore are described. An aspect of several embodiments of the invention isthe incorporation of conductive constraining core layers into PWBs usingexisting processes for manufacturing PWBs that do not include conductiveconstraining cores. A further aspect of the invention is the creation ofa PWB that includes electrically conductive constraining cores using asingle lamination cycle. An additional aspect of the invention is thecreation of a PWB that includes electrically conductive constrainingcores where a separate lamination cycle is not required to fill aclearance pattern in a constraining core prior to the constraining corebeing combined with other layers in the PWB.

One embodiment of the method of the invention includes drilling aclearance pattern in an electrically conductive constraining core,arranging the electrically conductive constraining core in a stack upthat includes B-stage (semi-cured) layers of dielectric material oneither side of the constraining core and additional layers of materialarranged to form the at least one functional layer, performing alamination cycle on the stack up that causes the resin in the B-stage(semi-cured) layers of dielectric to reflow and fill the clearancepattern in the electrically conductive constraining core before curingand drilling plated through holes.

A further embodiment includes extracting from a printed wiring boarddesign information concerning the locations of plated through holes thatare not intended to be in electrical contact with the electricallyconductive constraining core and determining the clearance pattern usingthe information concerning the locations of plated through holes thatare not intended to be in electrical contact with the electricallyconductive constraining core.

In another embodiment, the electrically conductive constraining core hastwo major surfaces and can conduct electricity directly from one majorsurface to the other.

In a still further embodiment, the electrically conductive constrainingcore has a dielectric constant greater than 6 at 1 MHz.

In still another embodiment, the electrically conductive constrainingcore is constructed using fibrous material impregnated with resin.

In a yet further embodiment, the fibrous material is carbon fiber.

In a further embodiment again, the carbon fiber is metallized.

In yet another embodiment, the electrically conductive constraining coreis constructed from a thick metal layer.

Another additional embodiment also includes screening resin into theclearance pattern in the electrically conductive constraining core priorto lamination.

A still yet further embodiment also includes stacking a plurality ofelectrically conductive constraining cores, drilling the clearancepattern in the stack of electrically conductive constraining cores andcreating lamination tooling holes in the electrically conductiveconstraining core.

Still yet another embodiment also includes printing and etching theelectrically conductive constraining cores to remove debris prior tolamination.

In a still further embodiment again, the B-stage (semi-cured) layers ofdielectric are prepregs and the stack up includes layers of electricallyconductive material.

In still another embodiment again, the B-stage (semi-cured) layers ofdielectric include at least 70% by volume resin content.

In a still further additional embodiment, regions of the electricallyconductive constraining core are constructed using a base substratematerial and at least one region of the electrically conductiveconstraining core is constructed using an insert substrate material.

Still another additional embodiment, also includes selecting a basesubstrate material, removing a section of the base substrate material,selecting an insert substrate material, cutting a piece of the insertsubstrate material that can be contained within the removed section ofthe base substrate material and arranging the base substrate materialand the piece of the insert substrate material as part of the stack up.

In a yet further embodiment again, drilling a clearance pattern alsoincludes determining the location and required width of a clearancechannel from a printed wiring board design, determining the distancebetween notches that are likely to be created when a selected drill bitand drill pitch are used to drill the channel, and selecting a drill bitand drilling pitch so that the distance between the notches is greaterthan the required width for the channel.

Yet another embodiment again also includes identifying a plated throughhole that creates an electrical connection with the electricallyconductive constraining core, which is closest to the clearance channel,using the printed wiring board design, determining the distance betweenthe clearance channel and the identified plated through hole, andselecting the drill bit and drilling pitch so that the resulting channeldoes not overlap the location of the identified plated through hole.

A another further embodiment also includes determining the height of thenotches and selecting a drill bit and drilling pitch so that the heightof the notches is less than 3 mil.

Still another further embodiment also includes selecting a drill bit anddrilling pitch so that the height of the notches is less than 1 mil.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an isotropic view of a printed wiring board in accordance withan embodiment of the invention on which a number of electronic devicespossessing different types of packaging are mounted.

FIG. 2 is a schematic cross-sectional view of the printed wiring boardshown in FIG. 1.

FIG. 3 is a flow chart illustrating a process for manufacturing aprinted wiring board from a base material and dielectric inserts inaccordance with an embodiment of the invention.

FIGS. 4a-4h are schematic cross-sectional views of various printedwiring board subassemblies that are constructed as part of themanufacturing process illustrated in FIG. 3.

FIG. 5 is a flow chart illustrating a process for manufacturing aprinted wiring board from a base material and at least onenon-dielectric (or electrically conductive) insert material inaccordance with an embodiment of the invention.

FIGS. 6a-6k are schematic cross-sectional views of various printedwiring board subassemblies that are constructed as part of themanufacturing process illustrated in FIG. 5.

FIG. 7 is a schematic cross-sectional view of a printed wiring boardincluding plated through holes in accordance with an embodiment of theinvention.

FIG. 8 is a flow chart illustrating a process for manufacturing aprinted wiring board in accordance with an embodiment of the invention.

FIG. 9 is a schematic cross sectional view of an electrically conductiveconstraining core in accordance with an embodiment of the invention.

FIG. 10 is a schematic cross sectional view of an electricallyconductive constraining core in accordance with an embodiment of theinvention.

FIG. 11 is a flow chart illustrating a process for manufacturing aprinted wiring board in accordance with an embodiment of the invention.

FIGS. 12a-12d are schematic cross-sectional views of electricallyconductive constraining cores as various processes are performed duringthe manufacturing process illustrated in FIG. 11.

FIGS. 13a-13b are schematic cross-sectional views of printed wiringboard assemblies that are constructed as part of the manufacturingprocess illustrated in FIG. 11.

FIG. 14 is a schematic cross-sectional view of a PWB including twoelectrically conductive constraining cores that act as electrical layersin accordance with an embodiment of the invention.

FIG. 15 is a schematic cross-sectional view showing a PWB including twoelectrically conductive constraining cores that act as physical and notelectrical layers in accordance with an embodiment of the invention.

FIG. 16 is a flow chart illustrating a process for manufacturing a metalcore printed wiring board in accordance with an embodiment of theinvention.

FIG. 17 is a flow chart illustrating a process for manufacturing aprinted wiring board with electrically conductive constraining cores inaccordance with another embodiment of the invention.

FIGS. 18a-18h are schematic cross-sectional views of various printedwiring board subassemblies that are constructed as part of themanufacturing process illustrated in FIG. 17.

FIG. 19 is a schematic top view of a constraining core in which apattern of clearance holes and slots have been drilled in accordancewith an embodiment of the invention.

FIGS. 20a-20d are schematic views of slots drilled using holes spaced atdifferent distances in accordance with an embodiment of the invention.

FIG. 21a is a table showing the size of a notch created when two holesare drilled a specified distance apart with a drill bit having aspecified diameter.

FIG. 21b is a schematic view of a pair of holes drilled in aconstraining core in accordance with an embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

Turning now to the drawings, processes for manufacturing printed wiringboards including electrically conductive constraining cores are shown.In many embodiments, printed wiring boards are constructed using asingle lamination cycle. In a number of embodiments, processes areperformed on electrically conductive constraining cores and othermaterials used in the construction of the printed wiring board to createa stack up that is formed into a printed wiring board using a singlelamination cycle. In other embodiments, a printed wiring board iscreated without the need for a separate lamination cycle to fillclearance holes drilled in the electrically conductive constraining coreprior to that core being combined with other functional layers of theprinted wiring board. Use of a single lamination cycle and/or theelimination of a lamination cycle can significantly increase yield andthroughput compared to manufacturing processes that use multiplelamination cycles. In several embodiments, the electrically conductiveconstraining cores include carbon materials. In other embodiments, theelectrically conductive constraining cores are thick metal cores. Innumerous embodiments, the conductive constraining cores includelocalized regions having different physical properties, such as CTE.

An embodiment of a printed wiring board (PWB) in accordance with thepresent invention is illustrated in FIG. 1. The PWB 10 includes a numberof electronic devices 12 that are contained within different types ofpackaging. The printed wiring board includes regions possessingdifferent CTEs. The location of the electronic devices on the printedwiring board is determined so that each electronic device is positionedabove a region of the printed wiring board that has a CTE compatiblewith the CTE of the electronic device. Typically, the CTE of interest isthe in-plane CTE of both the device packaging and the printed wiringboard. The compatibility of the CTE of the packaging of an electronicdevice and the CTE of the region of the printed wiring board is largelydependent upon the operating requirements of the particular applicationin which the printed wiring board is intended for use.

A cross section of the PWB 10 shown in FIG. 1 is illustrated in FIG. 2.The PWB 10 includes a number of functional and structural layersconstructed from various materials. The functional layers of the PWB arethe layers that are intended to establish electrical connections betweenelectronic devices and/or contain circuits that carry signals includingreference voltages such as power or ground voltages. The structurallayers of the PWB are the layers that are not intended to establishconnections between electronic devices and/or contain circuit tracescarrying signals. The structural layers are included for their physicalproperties.

The PWB 10 shown in FIG. 2 includes an electrically conductiveconstraining core 20 that can act as a structural layer, as a functionallayer or as a structural layer in portions and a functional layer inother portions. Throughout the specification electrically conductiveconstraining core layers are referred to as constraining cores. Theconstraining core 20 includes regions that are constructed fromdifferent materials. The illustrated embodiment includes regions 22 thatare constructed from a base material and at least one region 24 that isconstructed from an insert material. In instances where there aremultiple regions 24 constructed from insert materials, each of theinsert materials can possess different physical properties. Selection ofthe base and insert materials enables customization of the physicalproperties of the constraining core 20. In many embodiments, a resin 26or an equivalent thermosetting or thermoplastic material such as anadhesive is used to combine the regions into a single layer. The resincan provide structural support for the various regions of materials. Inmany embodiments, the resin also electrically insulates the constrainingcore 20 from adjacent layers of electrically conductive material 28. Theremainder of the PWB includes layers of electrically conductive material30 that can form functional layers of the PWB and that are separatedfrom each other by layers of dielectric material 32.

As will be discussed further below, the techniques described herein canbe used to combine almost any two types of material that can be used inthe construction of a PWB. The techniques described vary depending uponwhether the base materials and insert materials are dielectric materials(i.e., effectively impede the flow of the type of electric signals foundin a PWB) or are non-dielectric materials (i.e., electricallyconductive) and whether the resin 26 is dielectric or non-dielectric.The choice of base and insert materials can impact the physicalproperties of the PWB. In instances where the insert materials 24 thatform part of the constraining core 20 are constructed from materialshaving different sets of physical properties to those of the basematerial 22, the completed PWB can possess regions with differentphysical properties. In many instances, the insert materials 24 areselected to provide regions of the PWB with specific in-plane CTEscompatible with the in-plane CTEs of devices mounted on the PWB.

In the embodiment illustrated in FIG. 2, the base material 22 isconstructed from a non-dielectric material such as carbon fiberimpregnated with a resin such as EP 387 and EP450 manufactured byLewcott Corporation of Millbury, Mass., the insert material 24 isconstructed from a dielectric material such as E-glass impregnated withresin and the resin 26 combining the base and insert materials is adielectric resin.

The carbon fiber used as the base material in the embodiment shown inFIG. 2 is an example of a non-dielectric material suitable for use inthe construction of PWBs. Other examples of suitable non-dielectricmaterials include fibers coated in metal and impregnated with resin,solid carbon plates, Carbon-Silicon Carbide (C SiC), such as the C—SiCmanufactured by Starfire Systems Inc. of Malta, N.Y., Copper InvarCopper, Copper Molly Copper, Chemical Vapor Deposition (CVD) diamond,such as the CVD manufactured by Morgan Advanced Ceramics, DiamonexProducts Division located at Allentown, Pa., Diamond, Diamond LikeCarbon (DLC), Carbon composite and Graphite composite or a metal matrixcomposite. Each of these materials can be clad on at least one side.

When a non-dielectric material includes carbon fibers, the fibers can becontinuous, discontinuous, chopped or flakes. If discontinuous fibersare used, the fibers can be spin broken or stretch broken such as partno. X0219 manufactured by Toho Carbon Fibers Inc of Rockwood, Tenn. Inaddition, the carbon fiber can include PAN fibers and/or Pitch fibers.

Fibers that are suited to metal coating include carbon, graphite,Aramid, Kevlar, Quartz or any combinations of these fibers. Metals thatcan be used to coat fibers include Nickel, Copper, Palladium, Silver,Tin and Gold. Coating of fibrous material can be performed bymanufacturers such as Electro Fiber Technologies located at Stratford,Conn.

The configurations in which fibrous materials can be arranged includebeing woven, unidirectional or non-woven mats. When the material iswoven, the material can be in the form of a plain weave, twill weave,2×2 twill, basket weave, leno weave, satin weave, stitched uni weave or3D (three dimensional) weave.

Fibrous materials can also be used in a non-woven form such as aUni-tape or a mat. In many embodiments, carbon mats such as grade number8000040 2 oz mat or 8000047 3 oz mat manufactured by Advanced Fiber NonWovens, East Walpole, Mass. are used in the construction of the region22 constructed from a first material.

Carbon plates can be made using compressed carbon powder, carbon flakesor chopped carbon fiber.

A constraining core can also be constructed from a composite includingcarbon nanotubes impregnated with polymer. Carbon nanotubes can besingle walled carbon nanotubes, such as carbon single walled nanotubes(C-SWNT) manufactured by Raymor Industries Inc. Canada, carbon nanotubesdeveloped by National Institute of Advanced Industrial Science and/orTechnology (AIST) in Tsukuba, Japan. Single walled carbon nanotubes areunique forms of pure carbon, which are up to 100 times stronger thansteel at ⅙^(th) the weight. C-SWNT has impressive electrical properties,as it can conduct electricity up to 1,000 times faster than copper.Current density of carbon nanotubes is 10⁹ A/cm³ (1000× greater thancopper). C-SWNT can transfer heat up to 10 times greater than that ofcopper. Carbon nanotubes can be manufactured employing a Plasma Process,Chemical Vapor Deposition (CVD) chemical process, a Gas Phase CVDprocess, Arc Discharge process or a Laser Ablation process. Carbonnanotubes can be less than 1 nm to 100 nm in diameter and <2000 nm inlength.

In instances where the non-dielectric material includes a resin (e.g.,when it is a resin impregnated substrate), the resin can be Epoxy,Phenolic, Bismaleimide Triazine Epoxy (BT), Cynate Ester and/or aPolyimide based Bismaleimide (BMI), Phenolic, polyamide imide,polyacrylate, polyphenylene sulfide, tetrafluroethylene, polysulfone,polyphenylsulfone, polyethersulfone, polyphthalamide, polyacetal,polyketone, polycarbonate, polyphenylene oxide, polyether ether ketonebased or a combination of resins. The basic resin can also includefillers such as pyrolytic carbon powder, carbon nano-particles, carbonnanotubes (diameters ranging from <1-100 nm), carbon single wallednanotubes (C-SWNT), carbon powder, carbon particles, diamond powder,boron nitride, alumina, aluminum oxide, aluminum nitride, aluminumhydroxide, magnesium hydroxide, silica powder and ceramic particles tomodify the physical, mechanical, electrical and thermal properties ofthe base resin. The resin composite may contain between 2 and 80 percentby weight of such filler. In several embodiments, the filler particlesize is limited to be no greater than 25 um.

As discussed above, the insert material 24 shown in FIG. 2 isconstructed from a dielectric material. Examples of other dielectricmaterials that can be used in the construction of a PWB include Aramid,Kevlar, or any mixture of these fibrous materials.

In embodiments where the regions 24 constructed from a second materialinclude resin, the resin can be an Epoxy based resin, an BismaleimideTriazine Epoxy based resin, a Cynate Ester based resin and/or aPolyimide based resin. The resin system can also include fillers thatmodify the properties of the base resin.

In one embodiment, the resin 26 surrounding the regions 24 and 22 isconstructed from thin E-glass, such as 106 style reinforced E-glass,that has a high resin content, high crack resistance and high toughness.In many embodiments, the resin can be Bismaleimide Triazine Epoxy based,an Epoxy Cynate Ester blend, Cynate Ester based, Polyimide based and/orPTFE based. The resin 26 can also include one or more additives thatalter the base resin's physical properties. In many embodiments, theresin is capable of withstanding the forces associated with the thermalcycling of the various materials in the layer 20, which can havedifferent CTEs. Suitable materials include 44N106, 84N106 B-stagematerials manufactured by ARLON Electronic Material Division located atRancho Cucamonga Calif., USA. Also 370HR106, 370 106 epoxy as well asPCL-GIP-785 polyimide 106 B-staged material manufactured by PolyCladLaminates located at Franklin N.H., USA. Also Laser Preg G130 and 1080manufactured by ISOLA Laminates located at Chandler, Ariz. Other prepregstyles such as 1080, 2113, 2313, 2116, 7628 can also be used.

Many embodiments of PWBs in accordance with the present inventioninclude a constraining core 20 constructed using at least one or acombination of the dielectric and non-dielectric materials describedabove. The lists provided above are not exhaustive. The region 22constructed from a base material and the regions 24 constructed frominsert materials can be fabricated from virtually any material that canbe used alone or in combination with other materials to create alaminate suitable for use in a PWB. As discussed above, the choice ofmaterials is typically influenced by the physical properties of thematerials, including the resulting in-plane CTE of the region of the PWBincorporating the material.

In one embodiment, the layers of electrically conductive material 28 and30 can be constructed from Copper foils, manufactured by GOULDElectronics located at Eastlake, Ohio. Alternatively, the conductivematerial can be constructed from a resistive conductive foil such as theresistor-conductor materials manufactured by Ohmega Tehcnologies, Inc.of Culver City, Calif. In other embodiments layers of electricallyconductive material can be constructed by depositing copper by achemical process such as the process used in depositing copper in platedthrough holes, resin coated copper (RCC), Nickel coated copper foil,Nickel-Gold coated copper foil and any other material that can be usedin construction of the PWB. In addition, the layers of electricallyconductive material can be layers similar to the constraining core 20provided at least part of the constraining core 20 acts as a functionallayer.

In one embodiment, the dielectric layers 32 are constructed usingE-glass reinforced with resin. In other embodiments, the dielectriclayers can be constructed from an epoxy based material, Cynate Esterbased material, Polyimide based material, GTek material, PTFE basedmaterial, an Aramid based material, chopped Kevlar based material,Kevlar based material, Quartz based material and any other material thatcan be used in construction of a dielectric layer in a PWB.

Although many materials are listed above, embodiments of the presentinvention are not restricted to the use of the above materials. Othermaterials can be used in combination with the manufacturing techniquesdescribed below to construct PWBs in accordance with the presentinvention.

The method used to construct a PWB in accordance with the presentinvention is dependent upon the materials that are used to form theconstraining core 20. The variation in the manufacturing processesrelates to the electrical conductivity of the materials used in theconstruction of the PWB. In many instances, a layer of a PWB can beconstructed by cutting out sections of a base material and substitutinginsert materials in the cut out sections. A first process that can beused in embodiments of the present invention where the insert materialsused in the construction of the PWB are all dielectric and the resinused to combine the base and insert materials is also dielectric isshown in FIG. 3. A second process that can be used in embodiments of thepresent invention, where at least one of the insert materials used inthe construction of the PWB is non-dielectric and/or the resin used tocombine the base and insert materials is non-dielectric is shown in FIG.5. Examples of embodiments of each type of process in accordance withthe present invention are discussed below.

A method of constructing PWBs in accordance with an embodiment of thepresent invention that involves using dielectric insert materials tocreate regions possessing physical properties differing from theproperties of the remainder of the PWBs is illustrated in FIG. 3. Themethod shown in FIG. 3 can be used to construct the embodiment of thePWB illustrated in FIG. 2 and other embodiments where all of the insertmaterials and the resin used to combine the base and insert materialsare dielectric. The method 40 involves preparing (42) a base materialand insert materials. The preparation of the materials can include theremoval of sections of the base material and the cutting of insertmaterials to fit the removed sections of base material. The preparedbase and insert materials are then arranged (44) with dielectric layersand layers of electrically conductive material in preparation forlamination. The dielectric layers and layers of electrically conductivematerial can take the form of clad or unclad prepregs and laminates. Alamination cycle is then performed (46) to create a printed wiring boardsubassembly. Holes can be drilled (48) in portions of the printed wiringboard subassembly and the linings of the holes plated (491 withelectrically and/or thermally conductive material. The plated printedwiring board subassembly is printed and etched (50) to form a completedPWB. The PWB is then finished (52) and components can be mounted on thePWB.

Materials and printed wiring board subassemblies that are utilizedduring the manufacturing process shown in FIG. 3 in accordance with anembodiment of the present invention are illustrated in FIGS. 4a-4h. Asdescribed above, the process for manufacturing PWBs shown in FIG. 3includes preparing a base material 60 and insert materials 62. Thesematerials are the materials that are used to construct layers similar tothe constraining core 20 shown in FIG. 2. The base material 60 is thematerial that makes up the majority of the constraining core 20.

In the illustrated embodiment, the base material 60 is non-dielectricand clad on both sides with layers of electrically conducting materialsuch as copper. In other embodiments, the base material 60 can bedielectric and/or can be clad on one side or unclad. In embodimentswhere the base material is non-dielectric, the predrilling of the basematerial prior to lamination is typically necessary.

The base material can be prepared by drilling clearance holes 64 andcutting out sections 66. The drilled clearance holes are ultimatelyfilled with resin and can electrically isolate the non-dielectric basematerial from conductive platings of vias drilled through the PWB. Thecut out sections ultimately define the regions of the completed PWB thathave physical properties (such as CTE), which differ from properties ofother regions of the PWB.

As discussed above, the insert material 62 is dielectric. Each of theinsert materials is cut to a size that will fit within the appropriatecut out section 66 of the base material. Typically, the insert materialis cut with dimensions that are slightly smaller than the cut outregion. In one embodiment a gap 68 of 30 mil can be used. In otherembodiments, the gap 68 can be a distance ranging from 10 mil to 125mil. The gap 68 between the insert material 62 and the base material 60typically is filled with bonding material such as an adhesive or resin.

As part of the manufacturing process, the prepared base and insertmaterials are arranged (44) with dielectric layers 70 and layers ofelectrically conductive material 72 in preparation for the laminationcycle. This process can be understood with reference to FIGS. 4c-4e. Thematerials are arranged by initially taking a laminate 74 clad on bothsides with electrically conductive material 72 and stacking a firstprepreg 76 on top of the clad laminate. Typically, the electricallyconductive layer adjacent the prepreg is etched with circuit patterns.In the illustrated embodiment, the clad laminate 74 and the firstprepreg 76 are manufactured using any of the well known manufacturingtechniques employed by those of ordinary skill in the art.

The base material 60 is then placed on top of the first prepreg 76. Asdiscussed above, the base material can be prepared by drilling clearanceholes 64 and creating cut out sections 66. The insert materials 62 arethen placed in the cut out sections 66. The insert materials 62 are cutto leave a gap 68 with the base material 60 when they are inserted intothe cut out sections 66. The arrangement 78 is completed by placing asecond prepreg layer 80 on top of the layer formed by the base material60 and the insert materials 62. A laminate clad on both sides withlayers of electrically conductive material 82 is then placed on top ofthe second prepreg. The electrically conductive layer 82 adjacent thesecond prepreg can be pre-etched with circuit patterns. The resultingarrangement is illustrated in FIG. 4e. Although the illustratedembodiments include a prepreg and a laminate above and below the basematerial 60, other embodiments can include more than one patterned cladlaminate and/or prepreg on either side of the base material 60 in orderto form multiple functional layers. Indeed, a PWB in accordance with thepresent invention can be constructed using two prepregs, each clad onone side, that are positioned above and below the layer formed by thebase and insert materials. Furthermore, many embodiments includemultiple layers formed by combining a base material with at least oneinsert material.

A lamination cycle is then performed (46). The nature of the laminationcycle is dependent upon the nature of the prepregs and dielectric layersused in the arrangement 78. Manufacturers of resins, prepregs andlaminates specify the temperature and pressure conditions that arerecommended during lamination. The lamination cycle can be performed byadhering to the manufacturer's recommendations for the various materialsused in the construction of the PWB.

The lamination cycle produces the printed wiring board subassembly 84 inaccordance with an embodiment of the present invention shown in FIG. 4f.As a result of the lamination cycle, resin 86 fills the gaps 68 betweenthe base 60 and insert 62 materials and bonds them together. The resin86 also fills the clearance holes 64 and bonds the layers ofelectrically conductive material 90 and 91 to the layer 20′ formed bythe base 60 and insert 62 materials.

Through holes are drilled (48) in the printed wiring board subassembly.A drilled printed wiring board subassembly is shown in FIG. 4g. Theprinted wiring board subassembly includes a number of holes 92 thatextend through each of the layers of the printed wiring boardsubassembly.

Once the holes have been drilled, the holes are plated (49) and thelayers of electrically conductive material are printed and etched (50).These processes create circuits on and between the layers of the PWB. Asdiscussed above, the functional layers can include layers ofelectrically conductive material and regions of the layer 20′. Thecircuits created between the functional layers can be used to carryelectrical signals. A completed PWB (i.e., a PWB to which electronicdevices are connected or mounted) similar to the completed PWB shown inFIG. 2 can be created by mounting electronic devices on the PWB.

As discussed above, the method used to construct a PWB in accordancewith the present invention is dependent upon the materials that are usedto form the layers of the PWB. An embodiment of the method of thepresent invention that can be used where a layer of the PWB includes abase material and at least one insert material that is non-dielectricand/or the resin used to combine the base and insert materials isnon-dielectric is illustrated in FIG. 5. The process 100 includespreparing (102) a base material and insert materials. The prepared basematerial and insert materials are then arranged (104) with layers ofresin and electrically conductive material in preparation forlamination. A first lamination cycle is then performed (106) to create aprinted wiring board subassembly. Holes can then be drilled (108)through the printed wiring board subassembly to create clearance holes.The printed wiring board subassembly can then be printed, etched andoxided (110). The printed wiring board subassembly can then be arranged(112) with layers of resin and layers of electrically conductivematerial in preparation for a second lamination cycle. The secondlamination cycle is then performed (114) to produce a second printedwiring board subassembly. The second printed wiring board subassemblycan have holes drilled (116) in it. The holes can be lined (118) withelectrically and/or thermally conductive material. Once the holes arelined, the printed wiring board subassembly can be printed and etched(120) and the board finished (122).

Materials and printed wiring board subassemblies that are utilizedduring the manufacturing process shown in FIG. 5 are illustrated inFIGS. 6a-6k. As described above, the process for manufacturing PWBs inaccordance with the present invention illustrated in FIG. 5 includespreparing a base material 60′ and insert materials 62′. These materialsare the materials that are used to construct a layer similar to theconstraining core 20 shown in FIG. 2. As in the method illustrated inFIG. 3, the base material makes up the majority of the constraining core20 and is prepared by cutting out portions of material. These cut outportions 66′ ultimately contain the insert materials 62′, which definethe portions of the completed wiring board that can have physicalproperties (such as CTE) differing from the physical properties of otherregions of the board.

In the illustrated embodiment, the base material 60′ can be eitherdielectric or non-dielectric and the insert material 62′ isnon-dielectric. Each of the insert materials is cut to a size that willfit within the appropriate cut out section 66′ of the base material 60′.As discussed above, the insert materials are cut with dimensions thatare slightly smaller than the cut out regions 66′ and can have similartolerances as those discussed in relation to FIGS. 3 and 4a-4h.

During manufacture, the prepared base and insert materials are arranged(104) with layers including resin. In many embodiments, the layersincluding resin are in the form of a prepreg. The prepregs can besubstrates impregnated with a dielectric resin and/or resin films.Typically, the resin used in the prepregs is chosen to fill the cutoutclearance around the insert materials during lamination.

The arrangement of the base material, insert materials and layersincluding resin can be understood with reference to FIGS. 6a-6e.Initially a layer of prepreg 70′ is stacked on a foil 72′ (see FIG. 6c),then the base material 60′ is placed on top of the prepreg and theinsert materials 62′ are placed in the cut out portions 66′ of the basematerial. The arrangement is completed by placing a second prepreg 70′on top of the layer formed by the base material 60′ and the insertmaterials 62′ and then placing a second foil 72′ on top of the secondprepreg. The final arrangement 138 is illustrated in FIG. 6e. In otherembodiments, prepregs clad on one side can be used.

A first lamination cycle is performed (106) to produce the printedwiring board subassembly 139 shown in FIG. 6f. Typically, the laminationcycle is performed in accordance with the manufacturer's recommendationsfor the various materials used to form the arrangement 138. During thelamination, resin from the prepregs 70′ flows to fill the gaps 68′between the base material 60′ and the insert materials 62′. During thelamination, the resin softens, gels and cures thus bonding the basematerial 60′ to the insert materials 62′. The resin also bonds the layerformed by the base material 60′ and the insert materials 62′ to thelayers of electrically conductive material 72′.

Following the lamination, clearance holes 140 can be drilled (108) inthe printed wiring board subassembly 139. A printed wiring boardsubassembly in which clearance holes 140 have been drilled isillustrated in FIG. 6g. Ultimately, the clearance holes are filled witha dielectric material, such as a dielectric resin, and plated vias aredrilled through the resin filled clearance holes. The dielectricmaterial filling the clearance holes serve to electrically isolate thebase material 60′ and the insert materials 62′ from the plated viasdrilled through the clearance holes.

Following the clearance hole drilling, the layers of electricallyconductive material are printed, etched and oxided (110) to createclearance pads and remove debris. The printed wiring board subassemblycan then be arranged (112) with prepregs 70′ and layers of electricallyconductive material 72′ in preparation for a second lamination cycle. Inone embodiment, a stack is formed using a laminate 142 clad on bothsides with layers of electrically conductive material and prepreg 144located between the printed wiring board subassembly 139 and thelaminate. The laminate 142 is etched with a circuit pattern on the layerof electrically conductive material that faces the prepreg 144. Thestack can then be completed by adding another prepreg 146 and thenanother laminate 148 clad on both sides with layers of electricallyconductive material. The laminate 148 is etched with circuit patterns onthe layer of electrically conductive material that faces the prepreg146. The construction of the clad laminates 142 and 148 and the prepregs144 and 146 can be achieved using conventional manufacturing techniques.Although, the stack shown in FIG. 6h includes a prepreg and a cladlaminate above and below a printed wiring board subassembly, embodimentsof the present invention can include a prepreg clad on one side aboveand below the printed wiring board assembly. Alternatively, embodimentsof the present invention can include more than one prepreg and/orlaminate. In many embodiments, multiple printed wiring boardsubassemblies can be combined in a single stack to create a PWB. Inaddition, the printed wiring board subassembly can be used as a layer inthe construction of a PWB in accordance with the method shown in FIG. 3.

A second lamination cycle is performed (114) in order to produce asecond printed wiring board subassembly 149 shown in FIG. 6i. Again, thenature of the lamination cycle performed is dependent upon themanufacturer's recommendations for the materials used in theconstruction of the PWB. During the lamination, resin 150 from theprepregs 144 and 146 flows to fill the holes 140. Following thelamination, the resin in the prepregs 144 and 146 bonds the layers ofthe second printed wiring board subassembly together.

Once the second lamination cycle is complete, holes 152 can be drilled(116) in the second printed wiring board subassembly with a view tocreating mounting holes and plated vias. An embodiment of a secondprinted wiring board subassembly 149 with holes 152 drilled through itis shown in FIG. 6j. The holes can then be lined (118) to create platedvias 154 as is shown in FIG. 6k. Following the lining of the holes, theexternal layers of the PWB can be printed and etched (120) prior to thefinishing (122) of the PWB and the mounting of any components on thePWB.

An embodiment of a PWB 160 in accordance with the present invention thatincludes a base material that acts as a functional layer within the PWBis shown in FIG. 7. The illustrated PWB 160 can be constructed inaccordance with the process illustrated in FIG. 5. Electricalconnections are established between the base material and circuitspatterned on other electrically conductive layers of the PWB usingplated through holes 162.

Although specific materials have been referred to above in thediscussion of manufacturing PWBs in accordance with the presentinvention, any material that can be used in the manufacture of a PWB canbe used as either the base material or as an insert material in themanufacture of PWBs in accordance with the present invention. Thecombination of materials to form a PWB in accordance with the presentinvention is largely dependent upon the glass transition temperatures ofthe materials. In embodiments where a C-stage material (i.e., a materialthat has already undergone a full cure cycle) is used as the insertmaterials, then the base material can be a B-stage material (i.e., amaterial that is semi-cured) with a glass transition temperature that isequal to or lower than the glass transition temperature of the C-stageinsert material. The same is also true when the base material is aC-stage material and an insert material is a B-stage material. Inaddition, similar care in the choice of the resin used to combine thebase and insert materials should be used when the base and insertmaterials are C-stage materials. Once materials have been selected, themanufacturing method chosen depends upon whether any of the insertmaterials and/or the resin used to combine the base material and insertmaterials are non-dielectric. As discussed above, if the insertmaterials and the resin used to combine the base material and insertmaterials are dielectric then either the process shown in FIG. 3 or theprocess shown in FIG. 5 can be used to manufacture a PWB. If one of theinsert materials is electrically conductive and a plated via passesthrough that insert material, then the process shown in FIG. 5 istypically used.

The methods described above involve techniques for manufacturing PWBsthat include constraining cores combining base and insert materials.Referring now to FIGS. 8-18g, generalized methods for constructing PWBsthat include various different types of constraining cores are disclosedthat do not require the constraining core to undergo a lamination cycleprior to combination of the constraining core with other materials usedin the construction of the PWB. In a number of embodiments, a PWB isconstructed using a single lamination cycle. In other embodiments, a PWBis constructed using multiple lamination cycles. In many embodiments, asingle lamination cycle is used to fill clearance patterns and/or bondbase and insert substrate materials and to combine the constraining corewith adjacent functional layers.

A process for manufacturing a PWB including at least one constrainingcore in accordance with an embodiment of the invention is shown in FIG.8. The process 200 includes reviewing and preparing Gerber data (202)for manufacturability of the PWB. The review can involve determining thesmallest trace size, smallest gap between traces, smalles via hole size,drilling aspect ratio, signal impedance requirement, dimensionaltolerances, surface finish requirement, flatness tolerances and/or finalcutting requirement. In many embodiments, the PWB design includes insertmaterials with CTEs matched to the CTE of components mounted on the PWB.The constraining core layers are then processed (204) and laminated withother internal layers (206) using B-stage (semi-cured) dielectricprepregs. Following the lamination, the PWB can then be finished (208).Although the above process includes a single lamination cycle, in otherembodiments a patterned constraining core can be combined with B-stagedielectric prepregs and materials used to construct other layers of aPWB in a first lamination cycle and the PWB completed in subsequentlamination cycles.

Gerber data for PWBs including an embodiment of the present inventiontypically includes functional layers and non-functional layers. Thefunctional layers include signal layers, signal routing layers, tracelayers, circuit layers, ground plane layers, power plane layers, splitplane layers, reference plane layers, ground thermal plane layers, mixplane layers, buried passive layers and layers that contribute toelectrical communication with integrated circuits, bare dies and/orother devices connected to the PWB. The non-functional layers typicallyinclude fab drawings, drill drawings, drill data, solder mask layers,silk screen layers, solder paste layers, thermal plane layers,mechanical stiffener layers, structural layers and other layers that donot contribute to electrical communication with devices connected to thePWB.

A cross-sectional view of a constraining core in accordance with anembodiment of the invention is shown in FIG. 9. A constraining core 212includes an electrically conductive layer 214 sandwiched between a firstcladding layer 216 and a second cladding layer 218. Although theembodiment shown in FIG. 9 includes cladding on both sides, embodimentsof constraining cores in accordance with the invention can includecladding on one side only. The configuration shown in FIG. 9 andinvolving a constraining core having cladding layers on one or bothsides of the constraining layer can be referred to as a “clad compositelaminate” or a “clad laminate”.

The constraining core 212 is capable of conducting electricity from thefirst cladding layer 216 through the electrically conductive layer 214to the second cladding layer 218. In a number of embodiments, theconstraining core has a dielectric constant greater than 6 at 1 MHz. Asis discussed below, a variety of materials can be used in theconstruction of a constraining core in accordance with embodiments ofthe invention. The selection of the materials used in the constructionof a constraining core can depend on the benefits required at the finalproduct level such as heat transfer rate, coefficient of thermalexpansion, stiffness and combinations of these.

In one embodiment, the electrically conductive layer can be constructedusing fibrous material impregnated with resin. In a number ofembodiments, the fibrous material is carbon, graphite fibers such asCN80-3k, CN80-1.5k, CN-60, CN-50, YS-90 manufactured by Nippon GraphiteFiber of Japan, K13B12, K13C1U, K63D2U manufactured by MitsubishiChemical Inc. Japan or T300-3k, T300-1k, K800, K1100 manufactured byCytec Carbon Fibers LLC of Greenville, S.C. In other embodimentsmetallized fibers are used in the construction of the electricallyconductive layer. Fibrous material can be metallized by metallizingindividual fibers and forming the metallized fibers into a fabric, thefibers can be formed into a fabric and then metallized or a combinationof both metallization processes can be used. Fibers that can bemetallized include carbon, graphite, E-glass, S-glass, Aramid, Kevlar,quartz, liquid crystal polymers or combinations of these fibers. Oncemetallized, an electrically conductive layer can be formed in accordancewith the invention by impregnating the metallized fibers with resin.

In one embodiment, the fibrous material that is impregnated with resincan be continuous carbon fiber. In other embodiment, the fibrousmaterial can be discontinuous carbon fiber. Examples of suitablediscontinuous fibers include spin broken fibers such as X0219manufactured by Toho Carbon Fibers Inc. Rockwood, Tenn.

The fibrous material used in the construction of constraining cores inaccordance with embodiments of the invention can be woven or non-woven.Non-woven material can be in the form of a Uni-tape or a mat. Examplesof suitable carbon mats include grade number 8000040 and 8000047, 2 ozand 3 oz respectively manufactured by Advanced Fiber Non Wovens, EastWalpole, Mass. In other embodiments, any combination of fibrous materialand resin can be used that results in a layer possessing a dielectricconstant that is greater than 6.0 at 1 MHz.

In several embodiments, the conductive layer can be constructed from PANbased carbon fiber, Pitch based carbon fiber or a combination of bothPAN and Pitch fibers.

A variety of resins can be used to impregnate fibers to constructconductive layers in accordance with embodiments of the invention. Inseveral embodiments, the resin used to can be an Epoxy based resin suchas EP387 and EP450 manufactured by Lewcott Corporation located inMillbury, Mass. In a number of embodiments, the resin can be based onBismaleimide Triazine epoxy (BT), Bismaleimide (BMI), Cyanate Ester,Polyimide, Phenolic or a combination of resins. In many embodiments, theresin used to impregnate fibers includes filler material such aspyrolytic carbon powder, carbon powder, carbon particles, diamondpowder, boron nitride, aluminum oxide, ceramic particles, and phenolicparticles. In many embodiments, the resin is electrically conductive.

When the conductive layer is constructed from resin impregnated fibers,the conductive layer can derive its electrical properties from thefibers. For example, a conductive layer constructed from graphite fibersimpregnated with toughened epoxy. In other embodiments, the electricalproperties of the conductive layer can be driven by the resin. Forexample, a conductive layer constructed from glass fibers impregnatedwith toughened epoxy resin that has pyrolytic carbon powder as a fillermaterial.

The materials that can be used in the construction of a conductive layerare not limited to resin impregnated fibers. In many embodiments, theconductive layer is constructed from a solid carbon plate. In a numberof embodiments, the solid carbon plate is made using compressed carbonor graphite powder. In other embodiments, a solid carbon plate isconstructed using carbon flakes or chopped carbon fiber with thermoplastic or thermo setting binder. In many embodiments, the conductivelayer can be constructed using C—SiC (Carbon-Silicon Carbide)manufactured by Starfire Systems Inc. located in Malta, N.Y.

Metal cores can also be used. As discussed above, metal cores includethick metal layers, copper-Invar-copper and copper-Molly-copper.

In other embodiments, the materials used in the construction of theconductive layer are not limited to resin impregnated fibrous materialsand carbon composites. Any material or combination or materials that canform a layer having a dielectric constant greater than 6.0 at 1 MHz canbe used in the construction of an electrically conductive layer.

In many embodiments, the cladding layers are constructed from anelectrically conductive material such as a metal. In a number ofembodiments, the cladding layers are constructed using copper.

A cross-sectional view of a constraining core in accordance with anotherembodiment of the invention is shown in FIG. 10. The constraining core212′ includes an electrically conductive layer 214′. A constraining corethat does not have cladding layers on either side can be referred to asan “unclad composite laminate” or an “unclad laminate”.

The constraining core 212′ is capable of conducting electricity from onemajor surface to another through the electrically conductive layer 214′.In a number of embodiments, the constraining core 212′ has a dielectricconstant of 6 at 1 MHz. The electrically conductive layer 214′ can beconstructed in a similar fashion to the electrically conductive layer214 described above with respect to FIG. 9.

A process for constructing PWBs that incorporate constraining corematerials in accordance with an embodiment of the invention isillustrated in FIG. 11. The process 230 involves preparing (232) thematerials that will be used to create the constraining cores of the PWB.The preparation of the constraining core materials can include thedrilling or punching of tooling holes such as lamination tooling holes.The prepared constraining core materials are then stacked and drilled(234) with a clearance pattern. The drilled constraining core materialsare then printed and etched (236) to remove debris and to etch backcopper in a region around the periphery of the PWB. A prefab process canalso be performed (238) if required. A surface treatment such as a brownoxide treatment applied (240) to the surface of the constraining corematerials.

Parallel to the processes described above, the other internal layers ofthe PWB can be processed (242) using conventional processing techniquesto prepare the internal layers for lamination. The internal layerstypically include prepregs and layers of electrically conductivematerial. The processed constraining core layers are then arranged (244)with the processed internal layers in preparation for lamination. Alamination cycle is then performed (246) to create a printed wiringboard subassembly. Through holes can be drilled (248) through theprinted wiring board subassembly and the linings of the holes plated(250) with electrically and/or thermally conductive material to createPTHs. The external layers of the printed wiring board subassembly canthen be printed and etched (252). The PWB is then finished (254) andcomponents can be mounted on the PWB. Although the above processincludes a single lamination cycle, in other embodiments a patternedconstraining core can be combined with B-stage dielectric prepregs andmaterials used to construct other layers of a PWB in a first laminationcycle and the PWB completed in subsequent lamination cycles.

The process outlined above enables the construction of a PWB without theuse of an additional lamination cycle or special cure cycle to fillclearance holes in the constraining cores. During the lamination cycle(246), dielectric resin from the prepregs arranged on either side of theconstraining cores reflows into the clearance holes and slots drilled inthe constraining cores. In embodiments where the constraining coresinclude a base material with insert materials possessing physicalcharacteristics differing from those of the base materials, thedielectric resin from the prepregs reflows into the gaps between thebase material and the insert materials. The dielectric resin that flowsinto cavities within the constraining cores can electrically isolate theconstraining core from conductive plating of PTHs drilled through thedielectric resin filled cavities of the constraining core.

Materials used in the construction of constraining cores in accordancewith the process shown in FIG. 11 are illustrated in FIGS. 12a-12d. Aconstraining core similar to the constraining core illustrated in FIG. 9is shown in FIG. 12a. The constraining core is prepared for use in themanufacture of a PWB by drilling clearance holes. The drilled clearanceholes are ultimately filled with resin and can electrically isolate theconstraining core materials from PTHs.

A processed constraining core layer for use as a ground layer in a PWBin accordance with an embodiment of the invention is shown in FIG. 12b.The constraining core 212a includes a first pattern of clearance holes262. A processed constraining core layer for use as a power layer in aPWB in accordance with an embodiment of the invention is shown in FIG.12c. The constraining core 212b includes a second pattern of clearanceholes 264. A processed constraining core layer for use as anon-functional layer in a PWB in accordance with an embodiment of theinvention is shown in FIG. 12d. The constraining core 212c includes athird pattern of clearance holes 266.

As discussed above with respect to the manufacturing process shown inFIG. 11, prepared constraining core materials are arranged with layersof prepreg, layers of dielectric core material and layers ofelectrically conductive material in preparation for a lamination cycle.A stack up of constraining cores, prepregs, layers of dielectric coreand layers of electrically conductive material in accordance with anembodiment of the invention is shown in FIG. 13a. The stack up 270 isarranged by initially taking an electrically conductive material (copperfoil in this case) 272 and stacking a first prepreg 274 on top of thecopper foil. In the illustrated embodiment, the copper foil 272 and thefirst prepreg 274 are manufactured using any of the well knownmanufacturing techniques employed by those of ordinary skill in the art.

The constraining core layer 212b is then placed on top of the firstprepreg 274. As discussed above, the constraining core layer can beprepared by drilling a pattern of clearance holes 264. Constraining corelayer 212b acts as a power layer in the stack-up. A second prepreg 276is then placed on top of the constraining core layer 212. A laminate 278clad on both sides with electrically conductive material 280 is thenplaced on top of the second prepreg 276. Typically, the electricallyconductive layers on both sides of the laminate 278 are etched withcircuit patterns. A third prepreg 282 is then placed on top of thelaminate 278. Another constraining core layer 212a is then placed on topof the third prepreg 282. As discussed above, the constraining corelayer can be prepared by drilling a set of clearance holes 262.Constraining core layer 212a acts as a ground layer in the stack-up. Afourth prepreg 284 is located on top of the constraining core layer212a. The stack up 270 is completed by placing a second layer ofelectrically conductive material 286 (copper foil in this case) on topof the fourth prepreg layer 284.

Although the stack up illustrated in FIG. 13a includes a prepreg and alaminate above and below each of the constraining core layers, otherembodiments can include more than one patterned clad laminate and/orprepreg on either side of the constraining core layers in order to formmultiple functional layers. Indeed, a PWB in accordance with the presentinvention can be constructed using two prepregs, each clad on one side,that are positioned above and below the constraining cores. Furthermore,many embodiments include multiple constraining cores and layers ofelectrically conductive material separated by dielectric layers.

In one embodiment, prepreg layers used on both sides of the constrainingcore layers 212a and 212b have very high resin content such as 106 typeprepregs. Typical resin content in 106 prepreg is in excess of 70% byvolume. In other embodiments, prepreg layers used on both sides of theconstraining core layers 212a and 212b have sufficient resin to fill thedrilled clearance pattern and provide flat outside surfaces afterlamination. In another embodiment, multiple plies of prepregs can beused on either sides of the constraining core layers to fill clearanceholes and slots.

In a number of embodiments, prepregs such as 44N106 and 84N106manufactured by Arlon Materials of Rancho Cucamonga, Calif., can be usedto form a stack up in accordance with an embodiment of the invention. Inother embodiments, stacks up can include 1080F epoxy manufactured byHitachi Chemical Co. Ltd. of Japan, polyimide prepregs manufactured byHitachi Chemical Co. Ltd. of Japan, PCL-FRP-370 106 (78% RC) prepregsmanufactured by Polyclad Laminates of Franklin, N.H., GI30, 1080 prepregmanufactured by Isola Laminates of Chandler, Ariz., Epoxy 106 prepregmanufactured by Taconic of Petersburgh, N.Y., Epoxy 106 prepregmanufactured by Nanya Technology Corporation of Taiwan. In oneembodiment, 2 ply of 106 prepreg is used on either side of eachconstraining core. In other embodiments more than 2 ply of 106 prepregcan be used on each side of the constraining core if constraining corethickness is greater than 0.012″.

In other embodiment, Resin coated copper (RCC) foil can also be used oneither side of the constraining core to fill clearance pattern.

In a number of embodiments, constraining core thickness can be up to0.012″. In many embodiments, the constraining core thickness is limitedto 0.010″ and in several embodiments the thickness is limited to 0.080″.

As discussed above with respect to the manufacturing process shown inFIG. 11, a lamination cycle is performed on the stack up 270. The natureof the lamination cycle is dependent upon the nature of the prepregs anddielectric layers used in the stack up 270. Manufacturers of resins andprepregs specify the temperature and pressure conditions than arerecommended during lamination. The lamination cycle can be performed byadhering to the manufacturer's recommendations for the various materialsused in the construction of the PWB.

The lamination cycle produces the printed wiring board subassembly 270′in accordance with an embodiment of the present invention shown in FIG.13b. As a result of the lamination cycle, dielectric resin reflowed fromthe dielectric prepregs 274 and 276 and filled the pattern of clearanceholes 264′ in the constraining core 212b. Similarly, dielectric resinreflowed from the dielectric prepregs 282 and 284 and filled clearanceholes 262′ in the constraining core 212a. The various repreg layers alsobonds the layers of the stack up 270′ together.

A printed wiring board subassembly through which PTHs have been drilledis shown in FIG. 14. The printed wiring board subassembly 270″ includesPTHs 290 that extend through each of the layers of the printed wiringboard subassembly. The constraining cores 212a and 212b are functionallayers. In several locations where the PTHs intersect the constrainingcores, the resin filled clearance holes 262″ electrically isolate theconstraining core and the plated lining of the through hole. In a numberof locations where the PTHs intersect the constraining cores, the platedlining of the through hole directly contacts the material of theconstraining core. At these locations 292, electrical connections existbetween the PTHs and the constraining cores. A similar printed wiringboard subassembly is shown in FIG. 15. The printed wiring boardsubassembly 270″ includes two constraining cores 34 that act asnon-functional or structural layers only. Each of the PTHs in theprinted wiring board subassembly 270″′ are electrically isolated fromthe constraining cores by resin filled clearance holes 262′″.

Materials such as thick copper core, thick metal core,copper-invar-copper (CIC), copper-molybdenum-copper (CMC) are used inPWBs to address thermal and co-efficient of thermal expansion (CTE)control issues. A thick metal is typically difficult to process andrequires special processes to manufacture. A clearance pattern can bemanufactured using a special etching chemical. Alternatively, a drillingprocess similar to the process described above can also be used topattern clearance holes. Thick metal layers typically cannot, however,be stacked during clearance hole drilling. The ability to stackconstraining cores during clearance hole drilling can increasemanufacturing throughput as multiple cores can be drilledsimultaneously. Another issue that can arise when using thick metalcores is that there is a limitation on the size of the PTH that can bedrilled through metal core PWB, because smaller drill bits tend todeflect and/or break when drilling into a thick metal layer.

A method of constructing PWBs with metal cores is illustrated in FIG.16. A process 300 describes process for manufacturing a PWB thatincludes metal cores, such as CIC, CMC, and/or thick copper. The metalcores are prepared (304). The internal layers of the PWB are alsoprepared (302). Typically, preparation includes patterning circuits onthe internal metal layers. Clearance holes can be patterned onto themetal core (306) using any of the drilling methods described above. Aclearance hole pattern can also be created (308) in the metal coresusing metal etching chemistry. In many instances, a special surfacetreatment is desirable to apply (310) to the metal layers to facilitatebonding with the other layers in the PWB. Unlike the processes describedabove, the clearance hole pattern is not filled with resin duringlamination. Rather the clearance hole pattern is filled with resin priorto lamination. In several embodiments, clearance holes are filled (312)with resin including an appropriate filler material using a screeningmethod. The resin used to fill the clearance holes can be in a liquidform, can be in a paste form or it can be in a powder form. The metallayers are then baked or pressed (314) at a temperature recommended byresin manufacturer to cure or semi-cure the resin. The filled metal corelayers are then arranged (316) with the internal layers to form a stackup and a lamination process is performed. A variety of processes arethen performed (318) to complete the PWB. Although the above processincludes a single lamination cycle, in other embodiments a patternedmetal constraining core can be combined with B-stage dielectric prepregsand materials used to construct other layers of a PWB in a firstlamination cycle and the PWB completed in subsequent lamination cycles.

These limitations of separate hole filling and restrictions on use ofsmaller plated through holes that are associated with use of thick metalconstraining cores can be overcome by replacing metal cores with othertypes of constraining core materials.

A method of constructing PWBs that include conductive constraining coresthat utilize different materials having different physical propertiesthroughout different regions in the constraining core in accordance withan embodiment of the invention is illustrated in FIG. 17. The method 340involves preparing (342) a constraining core material. As part of thepreparation of the constraining core materials, sections of theconstraining core materials are removed. The prepared constraining corematerials are then arranged (344) with dielectric layers and layers ofelectrically conductive material in preparation for lamination. Thedielectric layers and layers of electrically conductive material cantake the form of clad or unclad prepregs and laminates. A laminationcycle is then performed (346) to create a printed wiring boardsubassembly. Holes can be drilled (348) in portions of the printedwiring board subassembly and the linings of the holes plated (349) withelectrically and/or thermally conductive material. The plated printedwiring board subassembly is printed and etched (350) to form a completedPWB. The PWB is then finished (352) and components can be mounted on thePWB. Although the above process includes a single lamination cycle, inother embodiments the patterned base and insert materials can becombined with B-stage dielectric prepregs and materials used toconstruct other layers of a PWB in a first lamination cycle and the PWBcompleted in subsequent lamination cycles.

Materials and printed wiring board subassemblies that are utilizedduring the manufacturing process shown in FIG. 17 in accordance with anembodiment of the present invention are illustrated in FIGS. 18a-18h. Asdescribed above, the process for manufacturing PWBs shown in FIG. 17includes preparing a constraining core material 360. This material issimilar to the layer 212 shown in FIG. 9.

In the illustrated embodiment, the constraining core material 360 isnon-dielectric and clad on both sides with layers of electricallyconductive material such as capper. In other embodiments, theconstraining core material 360 can be clad on one side or unclad. Inembodiments where the constraining core material is non-dielectric, thepredrilling of the constraining core material prior to lamination istypically necessary.

The constraining core material can be prepared by drilling clearanceholes 364 and clearance channels 366. The clearance channel can beproduced by drilling several holes very close to each other or by usinga router. The drilled clearance holes and channels are ultimately filledwith resin and can electrically isolate the non-dielectric constrainingcore material from PTHs drilled through the PWB.

As part of the manufacturing process, the prepared constraining corematerials are arranged (344) with dielectric layers 370 and layers ofelectrically conductive material 372 in preparation for the laminationcycle. This process can be understood with reference to FIGS. 18c-18e.The materials are arranged by initially taking a laminate 374 clad onboth sides with electrically conductive material 372 and stacking afirst prepreg 376 on top of the clad laminate. Typically, theelectrically conductive layer adjacent the prepreg is etched withcircuit patterns. In the illustrated embodiment, the clad laminate 374and the first prepreg 376 are manufactured using any of the well knownmanufacturing techniques employed by those of ordinary skill in the art.

The constraining core material 360 is then placed on top of the firstprepreg 376. As discussed above, the constraining core material can beprepared by drilling clearance holes 364 and clearance channels 366. Thearrangement 378 is completed by placing a second prepreg layer 380 ontop of the layer formed by the constraining core material 360. Alaminate clad on both sides with layers of electrically conductivematerial 382 is then placed on top of the second prepreg. Theelectrically conductive layer 372 adjacent the second prepreg can bepre-etched with circuit patterns. The resulting arrangement isillustrated in FIG. 18e. Although the illustrated embodiments include aprepreg and a laminate above and below the constraining core material360, other embodiments can include more than one patterned clad laminateand/or prepreg on either side of the constraining core material 360 inorder to form multiple functional layers. Indeed, a PWB in accordancewith the present invention can be constructed using two prepregs, eachclad on one side that are positioned above and below the layer formed bythe constraining core. Furthermore, many embodiments include multiplelayers formed by combining a constraining core material with at leastone dielectric material.

A lamination cycle is then performed (346). The nature of the laminationcycle is dependent upon the nature of the prepregs and dielectric layersused in the arrangement 378. Manufacturers of resins, prepregs andlaminates specify the temperature and pressure conditions that arerecommended during lamination. The lamination cycle can be performed byadhering to the manufacturer's recommendations for the various materialsused in the construction of the PWB.

The lamination cycle produces the printed wiring board subassembly 384in accordance with an embodiment of the present invention shown in FIG.18f. As a result of the lamination cycle, resin 386 fills the clearancechannel gaps and bonds layers together. The resin 386 also fills theclearance holes 364 and bonds the layers of electrically conductivematerial 390 and 391 to the layer 320′ formed by the constraining core360.

Through holes are drilled (48) in the printed wiring board subassembly.A drilled printed wiring board subassembly in accordance with anembodiment of the invention is shown in FIG. 18g. The printed wiringboard subassembly includes a number of holes 392 that extend througheach of the layers of the printed wiring board subassembly.

Once the holes have been drilled, the holes are plated (349) and thelayers of electrically conductive material are printed and etched (350).These processes create circuits on and between the layers of the PWB. Asdiscussed above, the functional layers can include layers ofelectrically conductive material and regions of the layer 320′. Thecircuits created between the functional layers can be used to carryelectrical signals. A completed PWB (i.e., a PWB to which electronicdevices are connected or mounted) can then be formed.

The process described above can also be used to manufacture PWBs thatinclude buried vias, blind vias and/or microvias. Similar process stepscan be used to manufacture integrated circuit substrates (IC substratesor package substrates) having at least one constraining core.

Many of the processes outlined above include forming slots in aconstraining core. Referring now to FIGS. 19-21 techniques for creatingslots using a drill that involve efficient use of the drill areillustrated.

A top view of a constraining core drilled with a pattern of clearanceholes and slots (or clearance channels) in accordance with an embodimentof the invention is shown in FIG. 19. The constraining core 400 includesclearance holes 404 and clearance channels 402. Clearance channels areproduced because either clearance holes are too close to each other orclearance holes are overlapping on each other. Clearance channels on aconstraining core layer can be located either where a plurality of PTHspass through the constraining core in close proximity or wherecross-sectional exposure of the constraining core is not desired afterfinishing printed wiring board (i.e., locations such as edges of theprinted wiring board or sectional walls of a cut-out region that areinside the area of the finished PWB). Generally clearance channels canbe formed in a constraining core by mechanical drilling, laser drilling,CNC routing, punching, laser cutting, water jet cutting process orcombinations of these processes. Clearance channels located inside thePWB area where a plurality of plated through holes are in closeproximity can be formed with mechanical drilling, laser drilling orlaser cutting process as these processes are more precise and accuratethan CNC routing, punching and water jet cutting process. Where highlevels of accuracy are required, mechanical drilling and laser drillingprocess are preferred.

A clearance channel differs from a plated through channel in that aclearance channel is drilled to electrically isolate one material fromthe constraining core. Clearance channels are typically considerablywider than a PTH. A plated through channel is a channel that creates anelectrical connection, typically between the PWB and a lead of anelectrical component. A plated through channel in accordance with anembodiment of the invention is shown in FIG. 20a. The channel 410includes a wall profile 412 that is very smooth. In embodiments wherethe channel is used to contain a component lead, such walls canfacilitate lead insertion. A smooth wall profile 412 can be formed bydrilling a plurality of holes at a very fine pitch such as 1 to 3 milpitch (preferably 1 mil (0.001 inch) pitch). At 1 mil pitch, 1000 holesform a 1.0 inch long plated through channel.

As indicated above, clearance channels are typically wider than platedthrough channels and are created using bigger diameter tools. Aclearance channel is shown in FIG. 20b. The clearance channel 420 hassmooth surfaces 422 similar to those of the plated through channel. Theplurality of holes 426 that are drilled to produce the clearance channel420 have a very fine pitch. As can be seen in FIG. 20b, the walls of theclearance channel are not entirely smooth. Ripples exist that areassociated with the repetitive drilling process. The notch height 424(i.e., the extent to which the material of the wall extends into thechannel, see FIG. 21b) is very small, less than 0.5 mil. Such a smoothclearance channel wall profile requires many holes to accomplish.

When creating clearance channels in a constraining core, smooth wallsare not always required. As seen in FIG. 20c and 20d, a coarser pitchcan be used to form a clearance channel (see clearance channels 430 and440 in FIG. 20c and FIG. 20d). The clearance channels shown have wallprofiles 432 and 442 that are not as smooth as wall profile 422. Coarserpitch will increase notch height 434 and 444. In many embodiments, acoarser pitch can be used to drill a channel with width equal to thedistance between the notches. In this way, a channel having a roughfinish can be created that does not have any notches that intrude withinthe required width of the channel. Reducing the number of holes requiredto form a channel can substantially increase throughput when drillingclearance hole and channel patterns in constraining cores.

In a number of embodiments, the length of the notch is limited by therisk of the notch breaking off during lamination and creating thepotential for short circuits between a PTH and the constraining core.Preferably notch height in the clearance channel on a constraining coreis less than 3 mils. More preferably notch height in the clearancechannel is less than or equal to 1 mil.

A table that relates notch size to clearance hole pitch and drilldiameter is shown in FIG. 21a. For example if hole size is 28 mil, holepitch can be increase to 10 mil and still notch size will be well under1.0 mil. The example demonstrates a reduction in the number of holes by1/10^(th) of the number required to achieve a wall smoothness comparableto that of a plated through channel.

Although the foregoing embodiments are disclosed as typical, it would beunderstood that additional variations, substitutions and modificationscan be made to the system, as disclosed, without departing from thescope of the invention. For example, multiple layers similar to theconstraining core 20 shown in FIG. 2 or 139 in FIG. 7 can be included ina single PWB. Also combinations of base materials and insert materialscan be used either as functional layers or as non-functional layers. Inembodiments where the base materials and insert materials are used toform a functional layer, the functional layer can be used as a groundlayer, a power layer or a split plane layer. In addition, any variety ofdielectric and electrically conductive materials can be used as eitherthe base material or as an insert material. Furthermore, the cut outsand inserts can be arbitrary shapes and multiple inserts can be locatedwithin a single cut out region of a base material. Accordingly, thescope of the invention should be determined not by the embodimentsillustrated, but by the appended claims and their equivalents.

What is claimed is:
 1. A method of constructing a printed wiring boardincluding an electrically conductive constraining core, where theelectrically conductive constraining core comprises a base material andan insert material, where the electrically conductive constraining coreis a functional layer of the printed wiring board, and where the printedwiring board includes at least one additional functional layer using asingle lamination cycle, comprising: removing at least one section of abase material, and replacing the at least one removed section with atleast one insert material, wherein the aggregate of the base materialand the at least one insert material defines the structure of theelectrically conductive constraining core; drilling a pattern ofclearance holes in an the electrically conductive constraining core;arranging the electrically conductive constraining core in a stack upthat includes B-stage [semi-cured] (semi-cured) layers of dielectricmaterial on either side of the constraining core and additional layersof material, where the electrically conductive constraining core, theB-stage [semi-cured] (semi-cured) layers of dielectric material, andadditional layers of material are arranged so that lamination of thestack up forms the functional layers of the finished printed wiringboard; performing a lamination cycle on the stack up that causes theresin in the B-stage [semi-cured] (semi-cured) layers of dielectric toreflow and fill the pattern of clearance holes in the electricallyconductive constraining core before curing; and drilling through holesthrough the laminated stack up and plating the through holes to createat least one electrical connection between the electrically conductiveconstraining core and one of the at least one additional functionallayers.
 2. The method of claim 1, further comprising: extracting from aprinted wiring board design information concerning the locations ofplated through holes that are not intended to be in electrical contactwith the electrically conductive constraining core; and determining thepattern of clearance holes using the information concerning thelocations of plated through holes that are not intended to be inelectrical contact with the electrically conductive constraining core.3. The method of claim 1, wherein the electrically conductiveconstraining core has two major surfaces and can conduct electricitydirectly from one major surface to the other.
 4. The method of claim 3,wherein the electrically conductive constraining core has a dielectricconstant greater than 6 at 1 MHz.
 5. The method of claim 3, wherein theelectrically conductive constraining core is constructed using fibrousmaterial impregnated with resin.
 6. The method of claim 5, wherein thefibrous material is carbon fiber.
 7. The method of claim 6, wherein thecarbon fiber is metallized.
 8. The method of claim 3, wherein theelectrically conductive constraining core is constructed from a thickmetal layer.
 9. The method of claim 8, further comprising screeningresin into the pattern of clearance holes in the electrically conductiveconstraining core prior to lamination.
 10. The method of claim 1,further comprising: stacking a plurality of electrically conductiveconstraining cores; drilling the pattern of clearance holes in the stackof electrically conductive constraining cores; and creating laminationtooling holes in the electrically conductive constraining core.
 11. Themethod of claim 10, further comprising printing and etching theelectrically conductive constraining cores to remove debris prior tolamination.
 12. The method of claim 1, wherein: the B-stage [semi-cured](semi-cured) layers of dielectric are prepregs; and the stack upincludes layers of electrically conductive material.
 13. The method ofclaim 1, wherein the B-stage [semi-cured] (semi-cured) layers ofdielectric include at least 70% by volume resin content.
 14. The methodof claim 1 wherein regions of the electrically conductive constrainingcore are constructed using a base substrate material and at least oneregion of the electrically conductive constraining core is constructedusing an insert substrate material.
 15. The method of claim 14, furthercomprising: selecting a base substrate material; removing a section ofthe base substrate material; selecting an insert substrate material;cutting a piece of the insert substrate material that can be containedwithin the removed section of the base substrate material; and arrangingthe base substrate material and the piece of the insert substratematerial as part of the stack up.
 16. The method of claim 1, whereindrilling a pattern of clearance holes further comprises: determining thelocation and required width of a clearance channel from a printed wiringboard design; determining the distance between notches that are likelyto be created when a selected drill bit and drill pitch are used todrill the channel; and selecting a drill bit and drilling pitch so thatthe distance between the notches closest to a plated through hole is notless than a predetermined clearance diameter.
 17. The method of claim16, further comprising: identifying a plated through hole that createsan electrical connection with the electrically conductive constrainingcore, which is closest to the clearance channel using the printed wiringboard design; determining the distance between the clearance channel andthe identified plated through hole; selecting the drill bit and drillingpitch so that the resulting channel does not overlap the location of theidentified plated through hole.
 18. The method of claim 16, furthercomprising: determining the height of the notches; and selecting a drillbit and drilling pitch so that the height of the notches is less than 3mil.
 19. The method of claim 18, further comprising selecting a drillbit and drilling pitch so that the height of the notches is less than 1mil.
 20. A method of constructing a printed wiring board that includesat least one constraining core, the constraining core comprising a basematerial and an insert material, and at least one functional layer,using a single lamination cycle, comprising: removing at least onesection of a base material, and replacing the at least one removedsection with at least one insert material, wherein the aggregate of thebase material and the at least one insert material defines the structureof the constraining core; arranging the constraining core, comprising abase material and at least one insert material, in a stack up thatincludes B-stage (semi-cured) layers of dielectric material on eitherside of a respective constraining core and at least one functional layerof material; and performing a lamination cycle on the stack up thatcauses the resin in the B-stage (semi-cured) layers of dielectric toreflow and bind adjacent layers within the stack up.
 21. The method ofclaim 20, wherein at least one of the insert materials includes carbon.22. The method of claim 20, wherein at least one of the insert materialsis a carbon plate.
 23. The method of claim 20, wherein at least one ofthe insert materials includes carbon fibers.
 24. The method of claim 20,further comprising drilling a pattern of clearance holes in the at leastone constraining core.
 25. The method of claim 24, further comprisingscreening resin into the pattern of clearance holes in the at least oneconstraining core prior to lamination.
 26. The method of claim 24,wherein drilling a pattern of clearance holes further comprises:determining the location and required width of a clearance channel froma printed wiring board design; determining the distance between notchesthat are likely to be created when a selected drill bit and drill pitchare used to drill the channel; and selecting a drill bit and drillingpitch so that the distance between the notches closest to a plated holeis not less than a predetermined clearance diameter.
 27. The method ofclaim 24, further comprising drilling through holes through thelaminated stack up and plating the through holes to create at least oneelectrical connection between layers within the laminated stack up. 28.The method of claim 20, further comprising: stacking a plurality ofconstraining cores; drilling a pattern of clearance holes in the stackof constraining cores; and creating lamination tooling holes in at leastone constraining core.
 29. The method of claim 20, wherein the B-stage(semi-cured) layers of dielectric are prepregs.
 30. The method of claim20, wherein the B-stage (semi-cured) layers of dielectric include atleast 70% by volume resin content.
 31. A method of constructing aprinted wiring board including an electrically conductive constrainingcore, where the electrically conductive constraining core comprises abase material and an insert material, where the electrically conductiveconstraining core is a functional layer of the printed wiring board, andwhere the printed wiring board includes at least one additionalfunctional layer, using a single lamination cycle, comprising: removingat least one section of a base material, and replacing the at least oneremoved section with at least one insert material, wherein the aggregateof the base material and the at least one insert material defines thestructure of the electrically conductive constraining core; arrangingthe electrically conductive constraining core in a stack up thatincludes B-stage (semi-cured) layers of dielectric material on eitherside of the electrically conductive constraining core and additionallayers of material, where the electrically conductive constraining core,the B-stage (semi-cured) layers of dielectric material, and additionallayers of material are arranged so that lamination of the stack up formsthe functional layers of the finished printed wiring board; performing alamination cycle on the stack up that causes the resin in the B-stage(semi-cured) layers of dielectric to reflow and bind adjacent layerswithin the stack up; and drilling through holes through the laminatedstack up and plating the through holes to create at least one electricalconnection between the electrically conductive constraining core and atleast one additional functional layer.
 32. The method of claim 31,wherein the electrically conductive constraining core has two majorsurfaces and can conduct electricity directly from one major surface tothe other.
 33. The method of claim 32, wherein the electricallyconductive constraining core has a dielectric constant greater than 6 at1 MHz.
 34. The method of claim 32, wherein the electrically conductiveconstraining core is constructed using fibrous material impregnated withresin.
 35. The method of claim 34, wherein the fibrous material iscarbon fiber.
 36. The method of claim 35, wherein the carbon fiber ismetallized.
 37. The method of claim 32, wherein the electricallyconductive constraining core is constructed from a thick metal layer.38. The method of claim 31, wherein the B-stage (semi-cured) layers ofdielectric are prepregs.
 39. The method of claim 31, wherein the B-stage(semi-cured) layers of dielectric include at least 70% by volume resincontent.
 40. The method of claim 31 wherein at least one insert materialincludes carbon.
 41. The method of claim 31 wherein at least one insertmaterial is a carbon plate.
 42. The method of claim 31 wherein at leastone insert material includes carbon fibers.
 43. A method of constructinga printed wiring board including a constraining core, comprising:providing a base substrate material; removing at least one section ofthe base substrate material; providing an insert material for at leastone section of the base substrate material removed, wherein each insertmaterial can be contained within a respective removed section; placingeach insert material in a respective removed section to form aconstraining core layer; arranging the constraining core layer in asubassembly stack up that includes B-stage (semi-cured) layers ofdielectric material on either side of the constraining core layer and atleast one additional layer of material; laminating the subassembly stackup; arranging the laminated subassembly in a stack up that includesB-stage (semi-cured) layers of dielectric material on either side of thelaminated subassembly and at least one additional layer of material; andperforming a lamination cycle on the stack up that causes the resin inthe layers of dielectric to reflow and bind adjacent layers within thestack up.
 44. The method of claim 43, wherein at least one insertmaterial includes carbon.
 45. The method of claim 43, wherein at leastone insert material is a carbon plate.
 46. The method of claim 43,wherein at least one insert material includes carbon fibers.
 47. Themethod of claim 43, wherein the constraining core is electricallyconductive.
 48. The method of claim 47, further comprising drilling apattern of clearance holes in the laminated subassembly.
 49. The methodof claim 48, further comprising drilling through holes through thelaminated stack up and plating the through holes to create at least oneelectrical connection between the electrically conductive core and atleast one additional layer of material.
 50. The method of claim 49,wherein drilling a pattern of clearance holes further comprises:determining the location and required width of a clearance channel froma printed wiring board design; determining the distance between notchesthat are likely to be created when a selected drill bit and drill pitchare used to drill the channel; and selecting a drill bit and drillingpitch so that the distance between the notches closest to a platedthrough hole is not less than a predetermined clearance diameter. 51.The method of claim 50, further comprising: identifying a plated throughhole that creates an electrical connection with the electricallyconductive constraining core, which is closest to the clearance channel,using the printed wiring board design; determining the distance betweenthe clearance channel and the identified plated through hole; selectingthe drill bit and drilling pitch so that the resulting channel does notoverlap the location of the identified plated through hole.
 52. Themethod of claim 51, further comprising: determining the height of thenotches; and selecting a drill bit and drilling pitch so that the heightof the notches is less than 3 mil.
 53. The method of claim 52, furthercomprising selecting a drill bit and drilling pitch so that the heightof the notches is less than 1 mil.
 54. A method of constructing aconstraining core for use in a printed wiring board, comprising:providing a base substrate material; removing at least one section ofthe base substrate material; providing an insert material for at leastone section of the base substrate material removed, wherein each insertmaterial can be contained within a respective removed section; placingeach insert material in a respective removed section to form aconstraining core layer; arranging the constraining core layer in astack up that includes B-stage (semi-cured) layers of dielectricmaterial on either side of the constraining core layer and at least oneadditional layer of material; and performing a lamination cycle on thestack up that causes the resin in the B-stage (semi-cured) layers ofdielectric to reflow and bind the layers.
 55. The method of claim 54,wherein at least one insert material is includes carbon.
 56. The methodof claim 54, wherein at least one insert material is a carbon plate. 57.The method of claim 54, wherein at least one insert material includescarbon fibers.